8.30am - 9.30am | Registration and coffee |
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9.30am - 9.35am | Welcome by Conference Chairman |
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9.35am - 10.00am | Morning Keynote Presentation |
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10.00am - 10.25am | Advance in Processing Density with Open VPX |
Embedding MACsec Encryption Cores into an FPGA |
10.25am - 10.45am | Coffee and an Opportunity to Visit the Exhibitors |
Stream A | Stream B | Workshop 1 | |
10.45am - 11.15am | Agile Modelling of Military Generic Architecture in a Tough Economy |
Gateway Strategies for Heritage Systems with Open Standards Networks |
Extreme Engineering Solutions
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11.20am - 11.50am | Why Defence Equipment Needs to be CE Marked |
Fully Integrated Rugged COTS Computers - Simple Quick and Hassle Free |
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11.55am - 12.25pm | Safe and Secure Virtualisation for the Next Generation of Avionics |
Ultra-Portable Cellular Networks for Next Generation Warfare |
12.25pm - 1.30pm | Lunch and Exhibition Time | |
Stream C | Stream D | |
1.30pm - 2.00pm | VPX and SWAP: Are We Missing Something? |
A Time Triggered Ethernet Based Network Transport for the Data Distribution Service |
2.05pm - 2.35pm | Moving Towards Deterministic Ethernet As Single Vehicle Network Backbone |
Securing your Device and Data for Military Communications and Systems |
2.40pm - 3.10pm | GVA and COTS, a Chicken and Egg Relationship |
Floating Point Co-processing for FPGAs Reduces Power Consumption while Increasing Productivity |
3.10pm - 3.30pm | Coffee and Exhibition Time | |
3.30pm - 4.00pm | Fast and Safe Implementation of High-Reliability Designs in FPGA |
Digital Certificate Platform for Embedded Systems |
4.00pm - 4.30pm | Panel Debate - International Collaboration |
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4.30pm - 4.45pm | Chairman's Closing Remarks |